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 Post subject: Re: I have a group project idea, A 5 axis 3d digitizing arm
PostPosted: Thu Jan 27, 2011 2:45 pm 
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Joined: Sun Jan 31, 2010 2:34 pm
Posts: 65
Cool idea. I have seen these before.

I think you would need to use real rotary optical encoders, something like this http://usdigital.com/products/encoders/incremental/rotary/shaft/s1/. They are sealed from the elements and can be purchased in resolutions from 30 to more than 10000 counts per revolution. I have several of them in the 1024 CPR range you would need more. Buy them surplus its way cheaper. ABC Electronics often has them. The bigger problem I think would be the Arduino's ability to capture the pulses. You would want/need to use interrupts and the Arduino Uno only has two external interrupts. I think the Arduino Mega has four.. I just don't know if any Arduino would be fast enough to catch the pulses from the encoder. It would partially depend on the CPR of the chosen encoder. Anyone want to do the math on what the minimum encoder necessary to do this?

-jrsphoto


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 Post subject: Re: I have a group project idea, A 5 axis 3d digitizing arm
PostPosted: Fri Jan 28, 2011 10:48 am 
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Joined: Thu Dec 02, 2010 12:25 pm
Posts: 75
Location: Minneapolis
This is an FPGA solution which might be relevant:

http://www.fpga4fun.com/QuadratureDecoder.html

I don't know enough about oscilloscopes to know if this would truly be useful, but it sure would be cheap:

http://www.fpga4fun.com/digitalscope.html

-Jim Hart


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 Post subject: Re: I have a group project idea, A 5 axis 3d digitizing arm
PostPosted: Fri Jan 28, 2011 11:17 am 
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Joined: Fri Dec 31, 2010 10:06 am
Posts: 30
Nice the FPGA Link had Verilog HDL for it:
Code:
module quad(clk, quadA, quadB, count);
input clk, quadA, quadB;
output [7:0] count;

reg [2:0] quadA_delayed, quadB_delayed;
always @(posedge clk) quadA_delayed <= {quadA_delayed[1:0], quadA};
always @(posedge clk) quadB_delayed <= {quadB_delayed[1:0], quadB};

wire count_enable = quadA_delayed[1] ^ quadA_delayed[2] ^ quadB_delayed[1] ^ quadB_delayed[2];
wire count_direction = quadA_delayed[1] ^ quadB_delayed[2];

reg [7:0] count;
always @(posedge clk)
begin
  if(count_enable)
  begin
    if(count_direction) count<=count+1; else count<=count-1;
  end
end

endmodule


That can be dropped right into the Spartan 3e FPGA board I have.


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 Post subject: Re: I have a group project idea, A 5 axis 3d digitizing arm
PostPosted: Fri Jan 28, 2011 11:21 am 
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Joined: Thu Dec 02, 2010 12:25 pm
Posts: 75
Location: Minneapolis
Hey, glad you found something useful!

If you wouldn't mind looking at the oscilloscope design, I'd really appreciate it. I could use a scope, and that looks like a dirt cheap way to do it.

-Jim Hart


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